x86 32bit Processor Core
6 stage pipe-line
Embedded I/D Separated L1 Cache
16K I-Cache, 16K D-Cache
SDRAM/DDRII Control Interface
Support DLL for clock phase auto-adjust
IDE Controller
Support 2 channels Ultra-DMA 100 (Disk x 4)
LPC (Low Pin Count) Bus Interface
Support 2 programmable registers to decode LPC address
MAC Controller x 1
PCI Control Interface
Up to 3 sets PCI master device
3.3V I/O
ISA Bus Interface
AT clock programmable
8/16 Bit ISA device with Zero-Wait-State
Generate refresh signals to ISA interface during DRAM refresh cycle
DMA Controller
Interrupt Controller
2 sets of 8254 timer controller
Timer output is 5V tolerance I/O on 2nd Timer
Real Time Clock (Internal Mode or External Mode)
Below 2uA power consumption on Internal Mode (Estimated Value)
FIFO UART Port x 5 (5 sets COM Port)
Compatible with 16C550/ 16C552
Default internal pull-up
Supports the programmable baud rate generator with the data rate from 50 to115.2Kbps
The character options are programmable for 1 start bits; 1, 1.5 or 2 stop bits; even, odd or no parity; 5~8 data bits
Support TXD_En Signal on COM1/COM2
Port 80h output data could be sent to COM1 by software programming
General Chip Selector
2 sets extended Chip Selector
I/O-map or Memory-map could be configurable
I/O Addressing: From 2 byte to 64K byte
Memory Address: From 512 byte to 4G Byte
General Programmable I/O
Supports 40 dedicated programmable I/O pins
Each GPIO pin can be individually configured to be an input/output pin
USB 2.0 Host Support
Supports HS, FS and LS
4 ports
PS/2 Keyboard and Mouse Interface Support
Compatible with 8042 controller
Speaker out
Embedded 256KB Flash
JTAG Interface supported for S.W. debugging
Input clock
Output clock
24 MHz
25 MHz
Operating Voltage Range
Core voltage: 1.2 V ~ 1.4V
I/O voltage: 1.8V ± 5% , 3.3 V ± 10 %
Operating temperature
-40 ~ 85 degree C
Package Type
27x27mm, 456 ball BGA




Block Diagram